Important announcement

Dear visitor,

Please note that this OpenCourseWare platform will be replaced at the end of 2026 by a new platform (under the same url ocw.tudelft.nl).

Courses and their contents that are currently available the platform will partly be migrated. URL’s for this content will change and content might be unavailable for some time. In addition, some courses will not be available anymore.

If you are linking to specific courses on this platform (for instance for your students), please take timely measures to avoid problems with access. Possible actions are:

  • Download the materials to your local platform (laptop, server)
  • For educators only (including TU Delft lecturers): Contact us at ocw@tudelft.nl and inform us what course you are using in what context (institute, program, period of use, number of students). We will research (in collaboration with the authors of the course) and decide if we will migrate the course, and if yes, can supply you with a new url.

Thank you.

With the continue scaling of transistor feature sizes, VLSI chip density continue increases. This results in a continue increase in the complexity VLSI technology where it has reached the point where billions of transistors are integrated on a single chip (like it is the case for System on Chip). To guarantee the satisfaction of the customers, the produced VLSI chips have to be reliable and fully tested. Verification testing and production testing represents 50 t0 60% of the cost of making VLSI chips, and are now the biggest cost of the technology.

It has been known for a while that tackling the problems associated with testing VLSI chips at earlier design stage levels significantly reduces testing cost. Thus it is important for hardware designers to be exposed to concepts of VLSI testing which can help them design better product at lower cost. This course is an introduction to the field of digital systems testing, which is an integral part of IC design and manufacturing. The topics discussed are: Importance of VLSI Testing, Test process and Automatic Test Equipment, Defects versus Fault models, Fault simulation, Logic simulation, Combinational Circuit Testing, Sequential Circuit Testing, Memory Testing, Design-for-Testability, Scan Design, Boundary Scan, Built-in-Self Test, Delay Test, Current Testing, VLSI Reliability, etc.

Creative Commons License
VLSI Test Technology & Reliabillity by TU Delft OpenCourseWare is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.
Based on a work at https://ocw.tudelft.nl/courses/vlsi-test-technology-reliabillity/.
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