Important announcement

Dear visitor,

Please note that this OpenCourseWare platform will be replaced at the end of 2026 by a new platform (under the same url ocw.tudelft.nl).

Courses and their contents that are currently available the platform will partly be migrated. URL’s for this content will change and content might be unavailable for some time. In addition, some courses will not be available anymore.

If you are linking to specific courses on this platform (for instance for your students), please take timely measures to avoid problems with access. Possible actions are:

  • Download the materials to your local platform (laptop, server)
  • For educators only (including TU Delft lecturers): Contact us at ocw@tudelft.nl and inform us what course you are using in what context (institute, program, period of use, number of students). We will research (in collaboration with the authors of the course) and decide if we will migrate the course, and if yes, can supply you with a new url.

Thank you.

Module 08

Course subject(s) Memory Testing

This module is about memory testing. After a motivation on why this topic is important, the basics of memory devices are given. Then, the architecture of semiconductor memory is elaborated and functional fault models are given. Lastly, memory test developments are discussed and some well-known memory tests are explained.

Corresponding to material treated in this module come the following textbook chapters: Chapter 9.

Creative Commons License
VLSI Test Technology & Reliabillity by TU Delft OpenCourseWare is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.
Based on a work at https://ocw.tudelft.nl/courses/vlsi-test-technology-reliabillity/.
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